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Freescale Semiconductor /MK61F15WS /DDR /CR47

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Interpret as CR47

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0000)P1PRI10RESERVED 0 (0000)P1PRI20RESERVED 0 (0000)P1PRI30RESERVED 0 (00)P1ORD 0RESERVED

P1ORD=00, P1PRI2=0000, P1PRI3=0000, P1PRI1=0000

Description

DDR Control Register 47

Fields

P1PRI1

Port 1 Priority 1 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest
RESERVED

Reserved
P1PRI2

Port 1 Priority 2 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest
RESERVED

Reserved
P1PRI3

Port 1 Priority 3 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest
RESERVED

Reserved
P1ORD

Port 1 Order

0 (00): Highest listing in the scan order

3 (11): Lowest listing in the scan order
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data